Public Call for National Co-Funding of Chips JU Projects

The Slovenian Ministry of the Interior and Public Administration has published a public call for requests for a Letter of Intent for national co-funding of projects within the Chips Joint Undertaking (Chips JU). Through the Letter of Intent, the Republic of Slovenia expresses its willingness to provide the national share of co-funding for projects involving […]

Newsletter, 14 Avg 2026

The latest KC Chip.si weekly newsletter is now available. Download it to explore recent news, events and training opportunities related to chips and semiconductor technologies, as well as key developments shaping the European semiconductor ecosystem.

Webinar: Presentation of Synopsys EDA Solutions for Academic and Research Environments

About the webinar At the webinar, representatives of Synopsys will present products and solutions for use in academic environments in the areas of integrated circuit (IC) design and verification, system-on-chip (SoC) development, semiconductor components, and embedded electronic systems. In addition to providing an introduction to Synopsys solutions, the main objective of the event is to […]

Online workshop on Focused Ion Beam (FIB)

About the training: The participants will learn the basics of scanning electron microscopy (SEM) and FIB operations. They will learn about the FIB and SEM applications (cross-section analysis, analysis of defects on a chip, contact deposition, structure etching, 3D tomography, e-beam lithography, lamella fabrication…), and the limitations of the device. The workshop will be interactive, […]

Bare Metal Programming on RISC-V

About the training: A hands-on, bare-metal course on the SiFive FE310-G002 RISC-V microcontroller (HiFive1 board), centered on interrupts, the machine timer, and, as its core, building a preemptive round-robin task scheduler with full context switching. Participants implement the scheduler from the ground up, programming mostly in C and using a small amount of RISC-V assembly […]

Proposal for the Chips Act 2.0

The proposed EU Chips Act 2.0 introduces additional measures to strengthen Europe’s semiconductor industry, reduce strategic dependencies on third countries, and support the development of advanced chip production within the EU. The act builds on the achievements of the original Chips Act and will further reinforce Europe’s existing strengths while accelerating the development of cutting-edge […]

European Semiconductor Collaboration Days

The event aims to connect Hungarian academic, industrial, and SME stakeholders with the European CCC network, fostering introductions, networking, and future international collaboration, with participants presenting their profiles, ideas, and partnership opportunities.  When: June 4.-5., 2026   Where: Budapest, Hungary  Cost: participation is free of charge  Registration: required, please register here.   For more detail and program please visit organizer webpage. 

Info Session on the Chips 2026 Calls on Skills

 The Chips Joint Undertaking (Chips JU), in cooperation with AENEAS, is organizing an information session on the Chips JU 2026 Calls on Skills. The event will present three calls aimed at supporting education, training, and talent development in the semiconductor field.  When: June 18th, 2026, 14:00-17:15 h  Where: on-line  Cost: free   Registration: required, please register here.   For more detail and program please visit […]

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UNIVERSITIES AND RTOs of CC CHIP.SI

Univerza v Ljubljani
UL FE & UL FRI
• cleanroom facilities sub-micron (Bi)CMOS
• mixed signal ASIC design, FPGA, RISC
• THz sensors and arrays, MEMS
• Si based photonic integrated circuits

University of Maribor
FERI
• mixed signal ASIC design (flight-proven chips)
• advanced waveguide and fiber sensor solutions
• micromachining technologies, MEMS, MOEMS

 

University of Nova Gorica
• organic electronics
• graphene based devices
• electro-optical characterization

Jožef Stefan Institute
• material research
• radiation detectors
• quantum technology
• thin-film chip related technologies
• ASIC design

CoE Nanoscience & Nanotechnology
Nanocenter
• nanofabrication facilities
• advanced quantum devices (supercond. transmon qubits)
• energy-efficient ultra fast memory (cryo, quantum)

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